1. Field of the Invention
The present invention relates generally to the field of printed wiring boards for Multi-Chip Module (MCM) systems for the attachment of and signal distribution between multiple integrated circuit chips. In particular, the present invention provides distinct signal planes having mechanical and electrical characteristics that differ from alternate signal planes based on requirements of the signals to be carried in the plane.
2. Prior Art
Mounting and interconnection of modern integrated circuits is typically accomplished through the use of Printed Wiring Boards (PWB). The connection of numerous chips in modern MCM systems for high performance computers requires multi-layer PWBs and the technological requirements for increased chip density, higher signal frequencies, and increased design complexity places high demands on PWB design techniques and manufacturing processes. The desired capabilities of PWBs are low resistance, constant transmission line impedance, high density of conductors, low cross-talk between conductors, high propagation velocity, low signal timing skew between multiple paths, ability to terminate lines in a characteristic impedance, and engineering change capability.
Development of a PWB requires engineering trades between the desired characteristics. Simultaneously achieving the desired characteristics is difficult. Low resistance and low cross-talk are incompatible with high density of conductors. Similarly, desire for high propagation velocity in combination with high density necessarily reduces the capability to perform engineering changes without redesign of PWB layers.
Various manufacturing and design techniques for multi-layer PWBs exist. Stripline and microstrip technologies are used singlely or combination in multi-layer PWBs for control of cross-talk and impedance. Buried microstrip technology and dual stripline technology are exemplary of improvements in the art to further refine basic design capabilities for multi-layer PWBs.
The complex routing of conductors in the various layers and between layers, and the extremely high density necessary in modern PWBs typically requires the use Computer Aided Design (CAD) systems for generation of the PWB layouts. CAD systems employing gridded design and gridless design have been employed for modern designs. Gridded systems require placement of conductors on a given grid spacing while allowing differing conductor width. Gridless systems typically employ a fixed separation of conductors while similarly allowing varying conductor widths. Present CAD systems employ identical mechanical and electrical characteristics such as pitch of the conductors and impedance for a given PWB layout. Design compromises for allowing all types of signals such as data, clock signals, and control signals, whether synchronous or asynchronous, are made to allow the signals to be carried in the signal planes. Consequently, an over design condition exists for many signals in order to accommodate requirements of asynchronous signals or clock signals for reduced cross-talk to avoid false triggering of these critical signals.
Arrangement on multi-layer printed circuit boards typically employs two layers between adjacent power or ground planes. These signal layers are arranged in a perpendicular relationship typically identified as "xy" to minimize cross-talk between the "x" and "y" layer based on the small overlap area between the "x" and "y" conductors. Additional layering intermediate adjacent power or ground planes has been accomplished in the prior art by addition of layers oriented at .+-.45.degree. with respect to the "x" and "y" layers (typically known as "r" and "s" layers). Cross-talk is again minimized between all layers; "r", "s", "x" and "y" because of small area overlap.
These layer orientations, while minimizing cross-talk, do not provide sufficient flexibility in modern design scenarios.